Technical comparison between SED and FED
R. L. Fink, Zvi Yaniv, L. H. Thuesen, Igor Pavlovsky
Applied Nanotech, Inc.3006 Longhorn Blvd., Suite 107, Austin, TX 78758, USA
Phone: 512-339-5020; FAX: 512-339-5021; email: dfink@appliednanotech.net
Abstract:
The surface-conduction electron-emitter display (SED) and the field emission display (FED) have many things in
common, mainly they are both technologies that realize a thin, flat display with CRT-like qualities of fast response time and high
efficiency, brightness and contrast ratio. The market direction for both technologies is the large-screen, HDTV. Both technologies
rely on controlling an array of electron beams to write an image on a phosphor-coated anode. Both technologies require an evacuated
glass envelope supported by multiple spacers distributed throughout the display. Both are ultimately based on field emission
concepts, but major differences in the emitter structure lead to significant differences in electronic drivers and display operation.
This presentation will focus on the similarities and differences between the two technologies and their effect on performance.
Key words:
Field Emission Display, FED, Surface-conduction Electron-emitter Display, SED, Surface Conduction Emitter, SCE
1. Introduction
The information display is a critical human interface to
electronic systems. Industry experts have been working for
decades to manufacture them larger, lighter, brighter, and
thinner– particularly for television use. Furthering the quest
for the exemplary display television is the introduction of
High Definition Television (HDTV). HDTV provides means
for transforming the entertainment experience. By delivering
crystal clear video in high resolution, high-fidelity surround
sound, full screen graphics and the ability to drive interactive
applications, HDTV delivers an immersive user experience
that is attracting consumers all over the world.
Because of the inherent flaws in current display
technology for HDTV, many researchers have turned to the
field emission display (FED) utilizing carbon nanotubes
(CNTs) as an electron emitted [1] as the technology of choice
for HDTV [2]. It is this technology that will be able to
support the HDTV revolution at an acceptable cost. On the
other hand, Canon and Toshiba have developed another class
of FED that is based on a lateral field emitter and called the
Surface-conduction Electron-emitter Display (SED). We
have classified the SED in the FED family for two reasons.
First, the Society for Information Display (SID) and other
display conference organizers generally place SED
presentations and posters together with FED talks; we will be
consistent with this convention. Second, there are many
things that the FED and SED have in common. Before we
begin with what makes the SED unique, let us first begin
with how they are similar.
2. Similarities of FED and SED
SED and FED technologies have many things in common,
as follows:
2.1 Form Factor
First, they are both flat- and thin-screen technologies that,
depending on the approach, can achieve HDTV specifications
for large-screen displays. Ishizuka [3] describes a 36-inch
diagonal SED panel having (H)1280 X 3 X (V)768 pixels
corresponding to a pixel size of 205
!
m X 3 X 615
!
m. This
display is only 7.3 mm thick [4], which is the sum of 2.8 mm
(cathode plate), 2.8 mm (anode plate) and 1.7 mm (vacuum
spacing). The panel weight is 7.8 kg. The weight and
thickness of an FED of comparable size is expected to be
about the same. The target market for both FED and SED is
large area HDTV [5].
2.2 View Technology
Second, they are both direct view, or emissive display
technologies. Each pixel or sub-pixel generates its own light
energy that is seen directly by the viewer, allowing high
contrast and efficiency and other performance improvements.
For SED and other FED technologies, the light that forms the
image is created by energetic electrons striking a phosphor
screen anode, very similar to the anode screen of a cathode
ray tube (CRT). The phosphors used are also the same or
very similar to those used in CRTs [6,7, 8].
2.3 Structure
Third, because electron acceleration requires a vacuum to
avoid corona or plasma discharge, the mechanical structure of
the SED and other FEDs consists of a hermetically sealed
glass envelope that is evacuated to form the vacuum space
required to accelerate the electron beams. Depending on the
size of the display and thickness of the glass walls, spacers
are generally required in order to support the glass walls
against the atmospheric pressure. The spacers must also be
capable of standing off high voltage gradients and be
optically invisible to viewers under normal operating
conditions. The 36-inch SED required 20 rib-type spacers to
maintain the 1.7 mm vacuum gap. A schematic of the SED
display is shown in Figure 1. FED displays have been
demonstrated with both rib-type and post-type spacers [9].
Furthermore, all FED technologies, including SED, require a
form of getter technology [10] to maintain the required
vacuum inside the glass envelope after the display is
evacuated and sealed.
Figure 1: Structure of SED (top) showing Cathode plate,
rib-type spacer and Anode plate
[3]. The structure for
FED (bottom) [11] is similar except for details of the
Cathode plate.
2.4 Manufacturing
Finally, the fabrication and assembly approaches are also
very similar, with the major exception being the cathode
plate, as will be described later.
All FED approaches being
developed today require assembling a face-plate (anode) with
a back-plate (cathode or electron source), together with
sidewalls, spacers and getters. First the anode and cathode
plates are fabricated separately, assembled with the other
components, sealed using glass frit or other novel materials
and then evacuated. Figure 2 diagrams the assembly process
for a CNT-based FED [12], but can be applied to other FED
technologies, including SED. In some approaches, the
sealing and evacuation steps are combined and still other
approaches hope to eliminate or reduce the number of spacers
[13]. New materials are under development to replace frit-
glass seals in order to lower the sealing temperature and to
avoid materials with high lead content [14].
Figure 2: Diagram showing the basic flow of display
fabrication.
The anode fabrication process is very similar for both
SED and FED. Figure 3 shows the details of the anode
configuration for an SED panel [3]. The black matrix and
color filters are used to improve contrast and the metal back
film is used to improve brightness and efficiency and also
acts as an electrode for the high voltage potential and bleeds
charge away from the phosphor during e-beam illumination.
These are standard technical modifications used in CRT, FED
and high-voltage VFD to improve the performance of the
phosphor.
Figure 3: Enlarged photo of anode plate for an SED
panel [4]. Although the dimensions may vary, the
structure is very similar for other FED displays
.
Cathode
Fabrication
Grid
Attachment
Spacer
Placement
Anode
Fabrication
Sidewall
Attachment
Getter
Attachment
Vacuum
Seal
Tip-off and
Gettering
Finally, both SED and CNT-based FED displays have used
printing to fabricate the anode and cathode plate, as will be
detailed in the following section. Thus depending on your
point of view, the SED and other FED technologies have
many components in common, such as the anode and
phosphors used on the anode, spacer technology, getters and
much of the assembly process. Now let’s look at what is
unique to SED and other FED technologies.
3. Differences between SED and FED
The significant differences between SED and FED are
clearly seen in the electron source plate and the drive
electronics. Before we discuss the significance of the
differences, we must first understand how each is structured
and operated.
3.1 Standard FED emitter configurations
Some typical configurations using carbon nanotube
emitters are shown in Figure 4. Microtip emitters have
similar configurations. In either case, electron beams are
created by extracting electrons from the emitter structure
(CNT or microtip) as a result of the high electric fields
applied to the emitter from voltage differences between the
anode, gate and cathode electrodes. In some cases, the anode
field contributes to the electron emission, but the cathode-
gate voltage difference controls the emission current intensity.
Metal Grid
Cathode Electrode
Gate
CNT
Focusing Gate
(a)
(b)
Metal Grid
Cathode Electrode
Gate
CNT
Focusing Gate
(a)
(b)
Figure 4: Configurations used for CNT emitters. (a) A
metal grid is suspended over the CNT electron-emitter
patch that sits on top of a cathode line. This is a
configuration used by ANI. (b) The gate structure is fully
integrated and photolithographically formed on the
cathode plate. This design also exhibits additional
focusing electrodes to help control the electron beam
width.
Electron current from the FED emitters is controlled by
the field applied to the emitter as a result of the cathode to
gate bias and is governed by the Fowler-Nordheim equation
[15]. The current from the emitter as a function of the
applied voltage is highly non-linear. An example of the I-V
characteristics for a CNT emitter is shown in Figure 5. In
addition to the applied field, the emission current is also
dependent on the workfunction (
"
) of the emitter and the
shape of the emitter. As the workfunction is decreased, such
as with a coating of alkali metal, it is easier to extract
electrons at lower fields. As the shape of the emitter
becomes sharper, it is also easier to extract electrons since the
local electric field is higher at the point of the emitter.
0
5
10
15
20
25
30
35
0
0.5
1
1.5
2
2.5
3
Electric field (V/micron)
Emission
current
(mA)
CNT
Cs-CNT
Figure 5: Emission current as a function of electric field
applied to a CNT emitter and a CNT emitter coated with
cesium. Cesium lowers the workfunction and allows
emission at lower extraction fields [16].
There are two important points to make concerning the
standard FED approaches. First, the configuration is largely
vertical. Typically, the gate is placed near the cathode
electrode such that the applied electric field is mostly vertical
at the cathode electrode where the CNT emitter is deposited.
The electrons that are emitted from the cathode travel directly
to the anode. Some broadening of the beam does take place
as a result of the lateral components of the applied field, but
these are limited as much as possible by the design or are
corrected with additional focus electrodes placed in the path
as needed. Typically, the goal of the FED designer is to
prohibit the electrons from striking any other surface other
than the anode after the electrons leave the emitters. As you
will see later, the SED emitter includes a multiple-scattering
process.
Secondly, typical FEDs are voltage-drive devices. In a
passive matrix FED display, it is difficult to apply more than
two or three voltage levels between the cathode and the gate
(ON and OFF voltages), so gray scale in the image is
achieved by pulse width modulation. As for all passive
matrix flat panel displays, the image is created line-by-line.
As one line is activated, the pixels in that line are switched
ON by the column drivers; the period that each pixel in the
line is left ON is determined by the luminous intensity
required from that pixel for that image frame. Since the
emission current from the emitters is highly non-linear and
the fabrication of the emitters is difficult to control, emission
uniformity and thus image uniformity is the major problem to
overcome for microtip and CNT displays. Fabrication
techniques have improved the uniformity of CNT-based
FEDs. Often emission uniformity across the cathode is
controlled by a current feed-back resistor placed in line with
the cathode electrode.
Fabrication of FED emitter is dependant of the approach
taken by the FED development team. Motorola and LETI
have developed processes that require CNT growth directly
on the cathode substrate while groups like ANI and Samsung
have developed processes that allow printing of the CNT.
Printing approaches are more favorable for fabricating large
area cathodes with uniform emission in high volume as
opposed to high-temperature CVD approaches required for
direct CNT growth. The printing approaches require an
activation step, but even this has been optimized for large-
area fabrication using a bead-blasting technique [17].
3.2 Structure of SED
The SED structure is unique to other FED approaches in
that the electron beam current supplied to the anode for each
pixel is generated in a 2-step process. Step 1) The electron
source operates by first emitting electrons laterally (parallel
to the cathode substrate) across a very narrow gap formed
between two electrodes. The gap between the electrodes,
although small, on the order of a few nanometers, is still a
vacuum gap that requires application of an electric potential
to extract electrons from one electrode through the vacuum
tunneling barrier to the other electrode. The current across
electrode gap follows the Fowler-Nordheim law and is thus
highly non-linear, allowing for matrix addressability as will
be discussed later. This lateral emitter structure is where the
term Surface Conduction Emitter (SCE) comes from. Figure
6 is a diagram of the SED emitter structure [4].
Figure 6
: Structure of SED [4]. Each sub-pixel has a
unique pair of electrodes that supplies an electron current.
Step 2) The electrons that tunnel across the gap and strike
the counter-electrode are either absorbed into the counter-
electrode (thereby creating only heat and no light) or they are
scattered, captured by the electric field created by the anode
potential and accelerated to a particular phosphor dot, thus
creating a spot of red, green or blue light. This combined
electron emission plus electron beam scattering process is
illustrated in Figure 7 where V
a
is the anode potential and V
f
is the driving potential across the gap. Multiple scattering
events may take place before the electron is captured by the
anode field. The efficiency of the number of electrons
captured by the anode field (I
e
/I
f
, Figure 7) is quite low, on
the order of 3%, but the power efficiency is reasonable since
V
f
is low, on order of 20 V [7]. Note also that the uniformity
of electron current reaching that anode is dependant on field
emission current at the gap convoluted with the efficiency of
scattering events from pixel-to-pixel.
Figure 7: Surface Conduction Emitter emission
mechanism [7].
The emitter that is described above is fabricated using a
combination of technologies [7]. The simple matrix wires are
deposited by a printing method using silver wires and
insulating films at the crossovers. Platinum electrodes are
formed using thin-film lithography, the gap between these
electrodes is 60
!
m. The carbon nano gap is created in a two
step process, beginning by depositing a PdO film (10 nm
thick) by ink-jet printing over and between the Pt electrodes.
This film is composed of ultrafine particles of PdO of
diameter about 10 nm. First, a gap is “formed” in this film
by reducing the oxide by passing a series of voltage pulses
across this PdO film between the two Pt electrodes. The PdO
is reduced by the heat of the pulses as the substrate is in a
vacuum environment. As the PdO is reduced, the film is
stressed and eventually a sub-micron gap is formed across the
diameter of the PdO dot. Second, the gap is “activated” by
exposing the cathode to an organic gas and more pulse
voltages are applied across the gap. These pulse voltages
create a local discharge that leads to CVD-like deposition of
a carbon film in the gap, such that the gap narrows to a self-
limiting distance of order 5 nm. When the gap is large,
carbon material is deposited as a result of the disassociation
of the hydrocarbon molecules in the plasma resulting from
the discharge. As the gap becomes smaller, the local
discharge current created by the pulse becomes large and
material is evaporated. At a gap of about 5 nm, deposition
and evaporation of carbon material reaches equilibrium. The
width of this gap is controlled by the pressure of the organic
gas and the pulse voltage. A cross section image of this gap
is shown in Figure 8.
Figure 8: (Top) SEM cross section image of the carbon
nano gap fabricated by the forming and activation
processes [7]. (Bottom) Diagram of the carbon nano gap
structure. The substrate deterioration is a result of the
high temperature created locally by the activation process.
[18].
Similar to the FED, the SED is driven line-by-line as
shown in Figure 9. The scanning circuit generates the scan
signal (V
scan
) and the signal modulation circuit generates a
pulse width modulation signal (V
sig
) that is synchronized with
the scan signal. Because of the highly non-linear I
e
-I
f
characteristics of the surface conduction emitter, it is possible
to drive each pixel selectively using a simple matrix x-y
configuration without active elements and still achieve a
luminance contrast ratio of 100,000:1 with a signal voltage of
18.9 V and a scanning voltage of 9.5 V [7]. Contrast these
values with typical signal voltage of 35 – 50 V and scanning
voltage of 50 – 100 V for CNT-based FED structures. The
SED switching devices are much lower voltage but they must
be designed for much higher steady-state current loads, as
much as a factor of 30 higher as a result of the inefficiency of
the SCE electron scattering mechanism. The larger currents
of the SED also forces the interconnect lines to have lower
resistances compared to FED as even a small voltage drop
along the line can result in edge-to-edge non-uniformity.
Figure 9: Diagram of SED matrix-addressed driving
method [7].
4. Conclusions
The SED and other FED technologies have many
components in common, such as the anode configuration and
phosphors used on the anode, spacer technology, getters and
much of the assembly process. Significant differences exist
in the emitter structure although both SED and other CNT-
based FED structures can be fabricated using printing
technology to help lower manufacturing cost for large area
displays. Both emitter structures obey the Fowler-Nordheim
characteristic allowing high contrast ratio using simple x-y
matrix addressing. SED has already demonstrated 100,000:1
contrast ratio; FED could also demonstrate similar values if
the same anode structure is used. Both SED and CNT-based
FEDs (for printed CNT layers) require an activation step,
although the nature of the activation process is much different.
The SED is driven at voltages about 20 V or lower, but
require much higher current capability. Demonstrated CNT-
based FEDs typical operate in the range of 50 – 100 V but the
drive current is much lower. Because of the high drive
currents and low drive voltages required, the interconnect
lines for SED need to be much more robust. Thus both SED
and CNT-based FED have demonstrated or have the potential
to demonstrate low-cost approaches for making high-quality,
large area HDTV displays. The fact that SED is closer to
market reflects the fact that this technology has been in
development longer.
5. References
[1] U.S. Patent 5,773,921 and RE38,223E; and RE38,561E.
[2] J. Dijon,
et al
., Proceedings IDW 2005.
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et al
., p. 1655, Proceedings IDW 2005.
[4] T. Oguchi,
et al.,
p. 1929, SID 2005 Digest.
[5] J. M. Kim, 2
nd
International Symposium on
Nanomanufacturing (ISNM 2004), p. 47.
[6] E. J. Chi,
et al.,
SID 2006 Digest, p. 1841.
[7] K. Yamamoto,
et al
., J. of the SID, Vol. 14, p. 73 (2006).
[8] B. Cummings,
et al
., p. 422, SID 2001 Digest.
[9] K. A. Dean,
et al
., p. 1847, SID 2006 Digest; and Z.
Yaniv,
et al.,
“Nanoelectronics as Applied to Field Emission
Displays Using Carbon Nanotubes”, elsewhere in these
proceedings.
[10] Marco Amiotti and Stefano Tominetti, p. 25, Vacuum
Solutions, July/August 1988.
[11] K. A. Dean,
et al.,
p. 1936, SID 2005 Digest.
[12] R. L. Fink,
et al
., p. 1748, SID 2006 Digest.
[13] T. Sugawara,
et. al
., p. 1752, SID 2006 Digest.
[14] K. Ishizeki,
et al.,
p. 1756, SID 2006 Digest.
[15] Robert Gomer, Field Emission and Field Ionization, pub.
American Institute of Physics, 1993.
[16] US Patent 6,885,022 and Z. Yaniv, 2
nd
International
Symposium on Nanomanufacturing (ISNM 2004), p. 705.
[17] R. L. Fink,
et al.,
p. 1251, Proceedings IDW 2004.
[18] Taiko Motoi,
et al.,
US Patent Publication 20020096986
.