Sigma-Delta ADC, From Behavioral Model to Verilog and VHDL
by Ali Behboodian
17 Sep 2007
(Updated 01 Oct 2007)
Model-Based Design of a Sigma-Delta ADC, from behavioral model to VHDL code.
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Description |
For a full description of the models, refer to the September 2007 MATLAB Digest article.
http://www.mathworks.com/company/newsletters/digest/2007/sept/sigmadelta.html
We present a series of Simulink models to design a high-level behavioral model of a Sigma-Delta ADC. The high-level behavioral model has an Analog section and a Digital section that comprises a digital filter. We partition the digital filter into three cascade filters that use a total of 10 times less filter coefficients than the original filter. We then elaborate the first filter in the cascade in such a way that it requires no multiplications for implementation. We convert our design to fixed-point. We then proceed to generate VHDL code for our elaborated filter using Simulink HDL coder. This is an example of Model-Based Design. |
Required Products |
Filter Design Toolbox
Fixed-Point Toolbox
DSP System Toolbox
Simulink
Simulink Fixed Point
Signal Processing Toolbox
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MATLAB release |
MATLAB 7.5 (R2007b)
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24 Sep 2007 |
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Updates |
19 Sep 2007 |
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20 Sep 2007 |
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01 Oct 2007 |
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