Vol. 41, No. 1/2 - Optical lithography
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Optical lithography: Introductionby G. L.-T. Chiu and J. M. Shaw, Guest editors The dramatic increase in performance and cost reduction in the electronics industry are attributable to innovations in the integrated circuit and packaging fabrication processes. The speed and performance of the chips, their associated packages, and, hence, the computer systems are dictated by the lithographic minimum printable size. Lithography, which replicates a pattern rapidly from chip to chip, wafer to wafer, or substrate to substrate, also determines the throughput and the cost of electronic systems. A lithographic system includes exposure tool, mask, resist, and all of the processing steps to accomplish pattern transfer from a mask to a resist and then to devices. For further reading, we suggest several excellent reviews of the optical lithography of integrated circuit fabrication [1-3] From the late 1960s, when integrated circuits had linewidths of 5 µm, to 1997, when minimum linewidths have reached 0.35 µm in 64Mb DRAM circuits, optical lithography has been used ubiquitously for manufacturing. This dominance of optical lithography in production is the result of a worldwide effort to improve optical exposure tools and resists. Although lithography system costs (which are typically more than one third the costs of processing a wafer to completion) increase as minimum feature size on a semiconductor chip decreases, optical lithography remains attractive because of its high wafer throughput. This topical issue of the IBM Journal of Research and Development focuses on optical lithography from manufacturing, development, and research perspectives. Electron-beam (e-beam) and X-ray lithographies have been considered as alternatives to optical lithography. However, wafer throughput with e-beam lithography is too slow for use in current semiconductor wafer production [4]. Currently e-beam lithography is regarded as complementary to optical lithography. Optical lithography depends on e-beam lithography to generate the masks. Because of its intrinsic high resolution, e-beam lithography is at present the primary lithographic technique used in sub-quarter-micron device research. X-ray lithography has been aimed at production since its inception. Efforts to displace optical lithography with X-ray lithography began in the 1960s [5], because of a presumption that the resolution of optical lithography was only suitable for dimensions greater than 1 µm. In addition to resolution limits, optical lithography had to solve the difficulties of lamp constraints and level-to-level overlay alignments. In the early 1970s, Wilczynski of IBM assembled a small group to address the resolution limits of optical lithography. In optical projection lithography, resolution is given by the equation W = k/NA,
where and NA are the exposure wavelength
and numerical aperture of the optical lithography tool, and
As the wavelength becomes shorter, the light source becomes more
complex and expensive. Initially, the light source was a mercury
lamp filtered for G- and H-lines, and later for the I-line
(365 nm). Lithography at a wavelength of 248 nm spurred the
development of a reliable and line
To address the issue of level-to-level overlay, i.e., the precise
aligning of successive masks with previous patterns on a silicon wafer,
Kirk and Wilczynski of IBM demonstrated the advantages of using
dark-field alignment [6], an important scheme that is standard on
many of today's exposure tools. It is important to note that both
optical and X-ray lithography rely on optical alignment schemes.
Optical lithography requirements are most evident in a manufacturing
environment as the wavelength of light for resist exposure is decreased
to provide high-resolution DRAM minimum feature sizes. In this issue of
the IBM Journal of Research and Development,
Holmes et al.
review how IBM led the effort in switching to deep-UV (248 nm) in the
1980s. IBM worked with tool vendors and internally developed
high-resolution, high-sensitivity deep-UV resists in order to make
this transition. Advanced DUV photolithography in a pilot line
environment is discussed by
Ausschnitt et al. They present the
collaborative development of 16Mb (0.5-µm) and 64Mb (0.35-µm) DRAM
generations by IBM, Siemens, and Toshiba.
The paper by Singh et al. documents the innovations in
high-numerical-aperture optical designs at IBM. Fused silica is the
only lens material available at wavelengths of 248 nm and 193 nm,
unless one resorts to calcium fluoride and lithium fluoride. As a
result, most lenses are monochromatic (to a bandwidth of several
picometers). As the wavelength becomes shorter, optical designs evolve
from all-refractive lenses (for G, H, I, and 248 nm) to catadioptric
systems, and finally to all-reflective systems (for 13 nm). This is the
first detailed presentation of a collection of lens configurations by
IBM.
Lincoln Laboratory has pioneered systematic research on how fused
silica is damaged by radiation at a wavelength of 193 nm, and has
collaborated with IBM on 193-nm resist research. Rothschild et al.
review 193-nm lithography at the MIT Lincoln Laboratory.
As part of his Ph.D. research at the University of Arizona, Goodman
carried out extensive computer aerial image simulations[7]
based on the Hopkins theory of partially coherent imaging [8]. Image
irradiance of an arbitrary, complex two-dimensional object can be
simulated by taking into account residual lens aberrations, depth of
focus, partial filling of the pupil, phase-shift masks, various
illumination schemes, etc. Aerial image simulation is important,
because the simulated results are deconvolved from resist properties.
For this reason, it is currently in wide use. The paper by Brunner
studies the impact of lens aberrations on optical lithographic quality
using image simulations.
The continuing advances in optical lithography depend not only on tool
design and improvements, but also on the concomitant development of
innovative resist materials and associated processing which defines the
chip circuitry. Even with the highest-resolution stepper available, the
aerial image projected through the mask is degraded because of
diffraction and lens aberrations. The resist must compensate for this
pattern distortion by converting a "blurred" aerial image to a
"sharp" binary stencil so that closely packed circuitry
features can be defined. This can be accomplished by designing
"high-contrast" resist systems that respond over a narrow range of
exposure intensity to eliminate the blurred edges of the aerial image.
In addition to providing high contrast to achieve resolution, the
resist exposure sensitivity must be optimized for the wavelength of the
optical tool. The high absorption of the resists developed for the G-,
H-, and I-line exposure tools would require such a large increase in
exposure dose at 248 nm that wafer throughput would ultimately be
affected.
Resist systems must also provide etch resistance, thermal stability
during processing, ease of developing, and adhesion to the substrate.
There are many synthetic paths to UV-sensitive polymers that will
cross-link, degrade, or undergo molecular rearrangement when
irradiated. This irradiated or exposed area can be either soluble
(positive resists) or insoluble (negative resists) relative to the
unexposed area. Both positive and negative systems combining all of the
attributes described above have been necessary to achieve the small
dimensions and linewidth control required for increased speed and
circuit density. The development of resist materials to meet these
demanding requirements is a significant challenge. Over the past forty
years, scientists have been able to provide a wide variety of materials
and processes to answer the resolution, sensitivity, and processing
needs of each succeeding chip generation.
Beginning in the early 1960s, Eastman Kodak was the first to provide
resists specifically designed for the electronics industry. These were
negative-resist systems which cross-linked upon exposure to light.
Their resolution was limited because of pattern swelling in
solvent-based developers. They were replaced in the 1970s by positive
resists developed by Azoplate which utilized diazoketones and novolak
resins that could be exposed using "near-UV" optical tools and
developed in water-based solutions. Improvements in the chemistry and
processing of these systems have provided resists that are still widely
used to fabricate half-micron devices. However, in the late 1980s
introduction of "deep-UV" tools at 248 nm required new resists
specifically designed to address future high-resolution and sensitivity
requirements. Over the next ten years, research on these advanced
materials produced resists that are currently used to manufacture 64Mb
memory chips at 0.35-µm ground rules. Excellent overviews of resist
materials are available[1,11].
Chemists are now turning their
attention to optical resist requirements for the future. New materials
are needed that will extend the current resolution limit of 248-nm
optical tools. The next generation of optical tools at 193 nm will
require a totally new resist chemistry, with etch resistance and
thermal stability that will provide resolution to 0.13 µm by the year
2005.
The resist papers in this issue provide a history of materials
development in IBM, their use in manufacturing, and advanced research
activities. The first two resist papers describe the research path to
the positive and negative resists currently used to manufacture IBM
logic and memory chips at 0.35-µm dimensions. The paper by Ito
documents the history and development in IBM of the chemical
amplification "deprotection" resists developed for 248-nm
lithography. The paper by Shaw et al. reviews the chemistry and process
improvements that extended the use of "near-UV" resists, and the
path to the development of the high-performance "deep-UV" negative
resist, CGR, used in logic manufacturing. Allen et al. describe the
design approaches and current status of single-layer photoresists for
193-nm lithography, which requires major departures from the chemistry
typical of 248-nm resists.
Another major limitation besides resolution in optical lithography is
the depth of focus (DOF), which is governed by the equation
DOF = k/NA²
where k is a constant for a specific
lithographic process. As resolution is increased through the use of
higher-NA tools, the depth of focus can decrease to less than 1 µm.
However, this depth may be comparable to the height of the device
topography. Multiple-layer resist and top-surface imaging, which
present a planarized top surface for exposure, can provide substantial
relief in this respect at the expense of process complexity. The paper
by Seeger et al. discusses the past, present, and prognosis for
planarized thin-film imaging.
In the late 1980s, there was a renewed interest in the use of
phase-shift masks to refine resolution and/or to improve depth of
focus. Characterization of phase-shift masks requires phase
information, in addition to the traditional dark/bright binary
amplitude information, and the use of resist as a measurement tool
requires a long feedback loop to debug the mask. This problem was
compounded by the numerous illumination schemes introduced by tool
vendors during the same time frame. Budd et al. review a new tool,
known as the AIMS(TM) (Aerial Image Measurement System), for
lithographic mask evaluation. This tool measures the aerial image at
the exposure wavelength using the same pupil-filling factor as the
stepper, and can thus simulate the exposure tool faithfully while
providing a much faster feedback loop for debugging the mask. This tool
is now available commercially from Zeiss as the Microlithography
Simulation Microscope, MSM100.
Optical lithography dedicated to packaging has not received much
attention (resists and materials for packaging applications were
reviewed in 1989 [12]. Since 1971, IBM has built its own lithography
tools for use in packages with thin-film top layers. In the late 1980s,
in response to the need for via hole sizes smaller than those
producible by mechanical drilling, laser ablation was developed at IBM
[13].
Doany et al. describe a 1× large-field scanning laser ablation
tool that can ablate via holes down to 8 µm. This tool was developed
in the IBM Research Division and transferred to the IBM
Microelectronics Division.
A conventional chrome mask cannot withstand the UV flux during laser
ablation without itself being ablated. Speidell et al. describe new
multilayer dielectric masks that are used in laser ablation technology.
The layers for conventional printed circuit boards are built in
parallel. Each layer patterns its conductor on a dielectric substrate
independently, and all of the patterned layers are then laminated
together. This parallel layer approach achieves a faster turnaround
time and avoids yield loss associated with each sequential fabrication
step. However, high-density, thin-film top layers are usually built
sequentially. Doany and Narayan review a laser release process which
builds high-density thin-film metal-polyimide layers in parallel.
The use of self-assembling materials (SAMs) is being explored at a
research level as a new approach to pattern formation. Biebuyck et al.
describe this method of pattern formation, which requires no light, but
relies on microcontact printing to transfer the pattern from an
elastomeric stamp.
Finally, we wish to thank the contributing authors for their
enthusiastic response, as evidenced by the number of papers received,
and the many referees who were involved in the reviewing process.
Special thanks goes to Evelyn Marino, whose secretarial support was
essential in maintaining the integrity of the schedule.
Received December 5, 1996; accepted for publication January 24, 1997
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